The inventive concept relates to a semiconductor memory device, and more particularly, to a synchronous dynamic random access memory (DRAM) semiconductor device capable of controlling data that is to be output or input.
A semiconductor memory device includes a memory in which data is stored. External data is written to the memory in response to a write signal, whereas data stored in the memory is output from the memory in response to a read signal.
A semiconductor memory device also includes an output buffer, and data stored in the memory is output via the output buffer. Signals used by an external apparatus that performs data communication with the semiconductor memory device may have different voltage levels as compared to those of signals used by the semiconductor memory device. In this case, the output buffer converts voltage levels of data output by the memory to suitable voltage levels for operations of the external apparatus.
A synchronous DRAM semiconductor device includes an output data strobe buffer. The output data strobe buffer generates an output strobe signal to control data output from the output buffer.
Such synchronous DRAM semiconductor devices are capable of inputting and outputting data, and use of such synchronous DRAM semiconductor devices is continuously increasing. As more data is input and output, the synchronous DRAM semiconductor device consumes more power.